These function attributes are supported by the x86 back end:
cdeclOn the x86-32 targets, the cdecl attribute causes the compiler to assume that the calling function pops off the stack space used to pass arguments. This is useful to override the effects of the -mrtd switch.
fastcallOn x86-32 targets, the fastcall attribute causes the compiler to pass the first argument (if of integral type) in the register ECX and the second argument (if of integral type) in the register EDX. Subsequent and other typed arguments are passed on the stack. The called function pops the arguments off the stack. If the number of arguments is variable all arguments are pushed on the stack.
thiscallOn x86-32 targets, the thiscall attribute causes the compiler to pass the first argument (if of integral type) in the register ECX. Subsequent and other typed arguments are passed on the stack. The called function pops the arguments off the stack. If the number of arguments is variable all arguments are pushed on the stack. The thiscall attribute is intended for C++ non-static member functions. As a GCC extension, this calling convention can be used for C functions and for static member methods.
ms_abisysv_abiOn 32-bit and 64-bit x86 targets, you can use an ABI attribute to indicate which calling convention should be used for a function. The ms_abi attribute tells the compiler to use the Microsoft ABI, while the sysv_abi attribute tells the compiler to use the System V ELF ABI, which is used on GNU/Linux and other systems. The default is to use the Microsoft ABI when targeting Windows. On all other systems, the default is the System V ELF ABI.
Note, the ms_abi attribute for Microsoft Windows 64-bit targets currently requires the -maccumulate-outgoing-args option.
callee_pop_aggregate_return (number)On x86-32 targets, you can use this attribute to control how aggregates are returned in memory. If the caller is responsible for popping the hidden pointer together with the rest of the arguments, specify number equal to zero. If callee is responsible for popping the hidden pointer, specify number equal to one.
The default x86-32 ABI assumes that the callee pops the stack for hidden pointer. However, on x86-32 Microsoft Windows targets, the compiler assumes that the caller pops the stack for hidden pointer.
ms_hook_prologueOn 32-bit and 64-bit x86 targets, you can use this function attribute to make GCC generate the “hot-patching” function prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2 and newer.
nakedThis attribute allows the compiler to construct the requisite function declaration, while allowing the body of the function to be assembly code. The specified function will not have prologue/epilogue sequences generated by the compiler. Only basic asm statements can safely be included in naked functions (see Basic Asm). While using extended asm or a mixture of basic asm and C code may appear to work, they cannot be depended upon to work reliably and are not supported.
regparm (number)On x86-32 targets, the regparm attribute causes the compiler to pass arguments number one to number if they are of integral type in registers EAX, EDX, and ECX instead of on the stack. Functions that take a variable number of arguments continue to be passed all of their arguments on the stack.
Beware that on some ELF systems this attribute is unsuitable for global functions in shared libraries with lazy binding (which is the default). Lazy binding sends the first call via resolving code in the loader, which might assume EAX, EDX and ECX can be clobbered, as per the standard calling conventions. Solaris 8 is affected by this. Systems with the GNU C Library version 2.1 or higher and FreeBSD are believed to be safe since the loaders there save EAX, EDX and ECX. (Lazy binding can be disabled with the linker or the loader if desired, to avoid the problem.)
sseregparmOn x86-32 targets with SSE support, the sseregparm attribute causes the compiler to pass up to 3 floating-point arguments in SSE registers instead of on the stack. Functions that take a variable number of arguments continue to pass all of their floating-point arguments on the stack.
force_align_arg_pointerOn x86 targets, the force_align_arg_pointer attribute may be applied to individual function definitions, generating an alternate prologue and epilogue that realigns the run-time stack if necessary. This supports mixing legacy codes that run with a 4-byte aligned stack with modern codes that keep a 16-byte stack for SSE compatibility.
stdcallOn x86-32 targets, the stdcall attribute causes the compiler to assume that the called function pops off the stack space used to pass arguments, unless it takes a variable number of arguments.
no_caller_saved_registersUse this attribute to indicate that the specified function has no caller-saved registers. That is, all registers are callee-saved. For example, this attribute can be used for a function called from an interrupt handler. The compiler generates proper function entry and exit sequences to save and restore any modified registers, except for the EFLAGS register. Since GCC doesn’t preserve SSE, MMX nor x87 states, the GCC option -mgeneral-regs-only should be used to compile functions with no_caller_saved_registers attribute.
interruptUse this attribute to indicate that the specified function is an interrupt handler or an exception handler (depending on parameters passed to the function, explained further). The compiler generates function entry and exit sequences suitable for use in an interrupt handler when this attribute is present. The IRET instruction, instead of the RET instruction, is used to return from interrupt handlers. All registers, except for the EFLAGS register which is restored by the IRET instruction, are preserved by the compiler. Since GCC doesn’t preserve SSE, MMX nor x87 states, the GCC option -mgeneral-regs-only should be used to compile interrupt and exception handlers.
Any interruptible-without-stack-switch code must be compiled with -mno-red-zone since interrupt handlers can and will, because of the hardware design, touch the red zone.
An interrupt handler must be declared with a mandatory pointer argument:
struct interrupt_frame;
__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame)
{
}
and you must define struct interrupt_frame as described in the processor’s manual.
Exception handlers differ from interrupt handlers because the system pushes an error code on the stack. An exception handler declaration is similar to that for an interrupt handler, but with a different mandatory function signature. The compiler arranges to pop the error code off the stack before the IRET instruction.
#ifdef __x86_64__
typedef unsigned long long int uword_t;
#else
typedef unsigned int uword_t;
#endif
struct interrupt_frame;
__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame, uword_t error_code)
{
...
}
Exception handlers should only be used for exceptions that push an error code; you should use an interrupt handler in other cases. The system will crash if the wrong kind of handler is used.
target (options)As discussed in Common Function Attributes, this attribute allows specification of target-specific compilation options.
On the x86, the following options are allowed:
Enable/disable the generation of the 3DNow! instructions.
Enable/disable the generation of the enhanced 3DNow! instructions.
Enable/disable the generation of the advanced bit instructions.
Enable/disable the generation of the ADX instructions.
Enable/disable the generation of the AES instructions.
Enable/disable the generation of the AVX instructions.
Enable/disable the generation of the AVX2 instructions.
Enable/disable the generation of the AVX5124FMAPS instructions.
Enable/disable the generation of the AVX5124VNNIW instructions.
Enable/disable the generation of the AVX512BITALG instructions.
Enable/disable the generation of the AVX512BW instructions.
Enable/disable the generation of the AVX512CD instructions.
Enable/disable the generation of the AVX512DQ instructions.
Enable/disable the generation of the AVX512ER instructions.
Enable/disable the generation of the AVX512F instructions.
Enable/disable the generation of the AVX512IFMA instructions.
Enable/disable the generation of the AVX512PF instructions.
Enable/disable the generation of the AVX512VBMI instructions.
Enable/disable the generation of the AVX512VBMI2 instructions.
Enable/disable the generation of the AVX512VL instructions.
Enable/disable the generation of the AVX512VNNI instructions.
Enable/disable the generation of the AVX512VPOPCNTDQ instructions.
Enable/disable the generation of the BMI instructions.
Enable/disable the generation of the BMI2 instructions.
Enable/disable the generation of the CLDEMOTE instructions.
Enable/disable the generation of the CLFLUSHOPT instructions.
Enable/disable the generation of the CLWB instructions.
Enable/disable the generation of the CLZERO instructions.
Enable/disable the generation of the CRC32 instructions.
Enable/disable the generation of the CMPXCHG16B instructions.
See Function Multiversioning, where it is used to specify the default function version.
Enable/disable the generation of the F16C instructions.
Enable/disable the generation of the FMA instructions.
Enable/disable the generation of the FMA4 instructions.
Enable/disable the generation of the FSGSBASE instructions.
Enable/disable the generation of the FXSR instructions.
Enable/disable the generation of the GFNI instructions.
Enable/disable the generation of the HLE instruction prefixes.
Enable/disable the generation of the LWP instructions.
Enable/disable the generation of the LZCNT instructions.
Enable/disable the generation of the MMX instructions.
Enable/disable the generation of the MOVBE instructions.
Enable/disable the generation of the MOVDIR64B instructions.
Enable/disable the generation of the MOVDIRI instructions.
Enable/disable the generation of the MWAITX instructions.
Enable/disable the generation of the PCLMUL instructions.
Enable/disable the generation of the PCONFIG instructions.
Enable/disable the generation of the PKU instructions.
Enable/disable the generation of the POPCNT instruction.
Enable/disable the generation of the PREFETCHWT1 instructions.
Enable/disable the generation of the PREFETCHW instruction.
Enable/disable the generation of the PTWRITE instructions.
Enable/disable the generation of the RDPID instructions.
Enable/disable the generation of the RDRND instructions.
Enable/disable the generation of the RDSEED instructions.
Enable/disable the generation of the RTM instructions.
Enable/disable the generation of the SAHF instructions.
Enable/disable the generation of the SGX instructions.
Enable/disable the generation of the SHA instructions.
Enable/disable the shadow stack built-in functions from CET.
Enable/disable the generation of the SSE instructions.
Enable/disable the generation of the SSE2 instructions.
Enable/disable the generation of the SSE3 instructions.
Enable/disable the generation of the SSE4 instructions (both SSE4.1 and SSE4.2).
Enable/disable the generation of the sse4.1 instructions.
Enable/disable the generation of the sse4.2 instructions.
Enable/disable the generation of the SSE4A instructions.
Enable/disable the generation of the SSSE3 instructions.
Enable/disable the generation of the TBM instructions.
Enable/disable the generation of the VAES instructions.
Enable/disable the generation of the VPCLMULQDQ instructions.
Enable/disable the generation of the WAITPKG instructions.
Enable/disable the generation of the WBNOINVD instructions.
Enable/disable the generation of the XOP instructions.
Enable/disable the generation of the XSAVE instructions.
Enable/disable the generation of the XSAVEC instructions.
Enable/disable the generation of the XSAVEOPT instructions.
Enable/disable the generation of the XSAVES instructions.
Enable/disable the generation of the AMX-TILE instructions.
Enable/disable the generation of the AMX-INT8 instructions.
Enable/disable the generation of the AMX-BF16 instructions.
Enable/disable the generation of the UINTR instructions.
Enable/disable the generation of the HRESET instruction.
Enable/disable the generation of the KEYLOCKER instructions.
Enable/disable the generation of the WIDEKL instructions.
Enable/disable the generation of the AVXVNNI instructions.
Enable/disable the generation of the CLD before string moves.
Enable/disable the generation of the sin, cos, and sqrt instructions on the 387 floating-point unit.
Enable/disable the generation of floating point that depends on IEEE arithmetic.
Enable/disable inlining of string operations.
Enable/disable the generation of the inline code to do small string operations and calling the library routines for large operations.
Do/do not align destination of inlined string operations.
Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and RSQRTPS instructions followed an additional Newton-Raphson step instead of doing a floating-point division.
Generate code which uses only the general registers.
Specify the architecture to generate code for in compiling the function.
Specify the architecture to tune for in compiling the function.
Specify which floating-point unit to use. You must specify the target("fpmath=sse,387") option as target("fpmath=sse+387") because the comma would separate different options.
On x86 targets, the prefer-vector-width attribute informs the compiler to use OPT-bit vector width in instructions instead of the default on the selected platform.
Valid OPT values are:
No extra limitations applied to GCC other than defined by the selected platform.
Prefer 128-bit vector width for instructions.
Prefer 256-bit vector width for instructions.
Prefer 512-bit vector width for instructions.
On the x86, the inliner does not inline a function that has different target options than the caller, unless the callee has a subset of the target options of the caller. For example a function declared with target("sse3") can inline a function with target("sse2"), since -msse3 implies -msse2.
indirect_branch("choice")On x86 targets, the indirect_branch attribute causes the compiler to convert indirect call and jump with choice. ‘keep’ keeps indirect call and jump unmodified. ‘thunk’ converts indirect call and jump to call and return thunk. ‘thunk-inline’ converts indirect call and jump to inlined call and return thunk. ‘thunk-extern’ converts indirect call and jump to external call and return thunk provided in a separate object file.
function_return("choice")On x86 targets, the function_return attribute causes the compiler to convert function return with choice. ‘keep’ keeps function return unmodified. ‘thunk’ converts function return to call and return thunk. ‘thunk-inline’ converts function return to inlined call and return thunk. ‘thunk-extern’ converts function return to external call and return thunk provided in a separate object file.
nocf_checkThe nocf_check attribute on a function is used to inform the compiler that the function’s prologue should not be instrumented when compiled with the -fcf-protection=branch option. The compiler assumes that the function’s address is a valid target for a control-flow transfer.
The nocf_check attribute on a type of pointer to function is used to inform the compiler that a call through the pointer should not be instrumented when compiled with the -fcf-protection=branch option. The compiler assumes that the function’s address from the pointer is a valid target for a control-flow transfer. A direct function call through a function name is assumed to be a safe call thus direct calls are not instrumented by the compiler.
The nocf_check attribute is applied to an object’s type. In case of assignment of a function address or a function pointer to another pointer, the attribute is not carried over from the right-hand object’s type; the type of left-hand object stays unchanged. The compiler checks for nocf_check attribute mismatch and reports a warning in case of mismatch.
{
int foo (void) __attribute__(nocf_check);
void (*foo1)(void) __attribute__(nocf_check);
void (*foo2)(void);
/* foo's address is assumed to be valid. */
int
foo (void)
/* This call site is not checked for control-flow
validity. */
(*foo1)();
/* A warning is issued about attribute mismatch. */
foo1 = foo2;
/* This call site is still not checked. */
(*foo1)();
/* This call site is checked. */
(*foo2)();
/* A warning is issued about attribute mismatch. */
foo2 = foo1;
/* This call site is still checked. */
(*foo2)();
return 0;
}
cf_checkThe cf_check attribute on a function is used to inform the compiler that ENDBR instruction should be placed at the function entry when -fcf-protection=branch is enabled.
indirect_returnThe indirect_return attribute can be applied to a function, as well as variable or type of function pointer to inform the compiler that the function may return via indirect branch.
fentry_name("name")On x86 targets, the fentry_name attribute sets the function to call on function entry when function instrumentation is enabled with -pg -mfentry. When name is nop then a 5 byte nop sequence is generated.
fentry_section("name")On x86 targets, the fentry_section attribute sets the name of the section to record function entry instrumentation calls in when enabled with -pg -mrecord-mcount
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