These command-line options are defined for LoongArch targets:
-march=cpu-type
Generate instructions for the machine type cpu-type. In contrast to -mtune=cpu-type, which merely tunes the generated code for the specified cpu-type, -march=cpu-type allows GCC to generate code that may not run at all on processors other than the one indicated. Specifying -march=cpu-type implies -mtune=cpu-type, except where noted otherwise.
The choices for cpu-type are:
This selects the CPU to generate code for at compilation time by determining the processor type of the compiling machine. Using -march=native enables all instruction subsets supported by the local machine (hence the result might not run on different machines). Using -mtune=native produces code optimized for the local machine under the constraints of the selected instruction set.
A generic CPU with 64-bit extensions.
LoongArch LA464 CPU with LBT, LSX, LASX, LVZ.
-mtune=cpu-type
Optimize the output for the given processor, specified by microarchitecture name.
-mabi=base-abi-type
Generate code for the specified calling convention. base-abi-type can be one of:
Uses 64-bit general purpose registers and 32/64-bit floating-point registers for parameter passing. Data model is LP64, where ‘int’ is 32 bits, while ‘long int’ and pointers are 64 bits.
Uses 64-bit general purpose registers and 32-bit floating-point registers for parameter passing. Data model is LP64, where ‘int’ is 32 bits, while ‘long int’ and pointers are 64 bits.
Uses 64-bit general purpose registers and no floating-point registers for parameter passing. Data model is LP64, where ‘int’ is 32 bits, while ‘long int’ and pointers are 64 bits.
-mfpu=fpu-type
Generate code for the specified FPU type, which can be one of:
Allow the use of hardware floating-point instructions for 32-bit and 64-bit operations.
Allow the use of hardware floating-point instructions for 32-bit operations.
Prevent the use of hardware floating-point instructions.
-msoft-float
Force -mfpu=none and prevents the use of floating-point registers for parameter passing. This option may change the target ABI.
-msingle-float
Force -mfpu=32 and allow the use of 32-bit floating-point registers for parameter passing. This option may change the target ABI.
-mdouble-float
Force -mfpu=64 and allow the use of 32/64-bit floating-point registers for parameter passing. This option may change the target ABI.
-mbranch-cost=n
Set the cost of branches to roughly n instructions.
-mcheck-zero-division
-mno-check-zero-divison
Trap (do not trap) on integer division by zero. The default is -mcheck-zero-division for -O0 or -Og, and -mno-check-zero-division for other optimization levels.
-mcond-move-int
-mno-cond-move-int
Conditional moves for integral data in general-purpose registers are enabled (disabled). The default is -mcond-move-int.
-mcond-move-float
-mno-cond-move-float
Conditional moves for floating-point registers are enabled (disabled). The default is -mcond-move-float.
-mmemcpy
-mno-memcpy
Force (do not force) the use of memcpy
for non-trivial block moves. The default is -mno-memcpy, which allows GCC to inline most constant-sized copies. Setting optimization level to -Os also forces the use of memcpy
, but -mno-memcpy may override this behavior if explicitly specified, regardless of the order these options on the command line.
-mstrict-align
-mno-strict-align
Avoid or allow generating memory accesses that may not be aligned on a natural object boundary as described in the architecture specification. The default is -mno-strict-align.
-msmall-data-limit=number
Put global and static data smaller than number bytes into a special section (on some targets). The default value is 0.
-mmax-inline-memcpy-size=n
Inline all block moves (such as calls to memcpy
or structure copies) less than or equal to n bytes. The default value of n is 1024.
-mcmodel=code-model
Set the code model to one of:
The default code model is normal
.
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Licensed under the GNU Free Documentation License, Version 1.3.
https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/LoongArch-Options.html